The semiconductor chips in our computers and smartphones should become even smaller and even faster.

Without powerful computer chips, there would be no smartphones, artificial intelligence and robotics.

5G, Industry 4.0 or autonomous cars would be unthinkable.

And that's why the number of transistors on a chip will probably continue to double every year and a half in the coming decade and the structures will shrink accordingly, just as Gordon Moore predicted in 1965.

Manfred Lindinger

Editor in the “Nature and Science” section.

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While the first integrated circuit - built in 1958 by Jack Kilby from four transistors and four capacitors - was still the size of a paper clip, at the turn of the millennium the smallest structures on a fingernail-sized Pentium IV processor with its hundred million switches were already 100 nanometers.

Today the tiniest details on a modern microchip have shrunk to around seven nanometers.

And all well-known chip manufacturers are preparing for the next big leap.

And this has succeeded this year: Researchers working with Huiming Bu from the IBM research center in Albany (New York) have developed a computer chip whose smallest structures measure only two nanometers.

Conquering the third dimension

Thanks to the special manufacturing technology, 50 billion field effect transistors can be accommodated on a chip the size of a postage stamp. As Bu reported in his breakthrough lecture in Berlin, this chip promises 45 percent higher performance and 75 percent lower energy consumption than the 7 nanometer chips available today that are found in most smartphones.

For a long time it was believed that increasingly fine two-dimensional structures could be etched into thin silicon wafers with ever shorter laser wavelengths. However, if the conductive channel between the three electrodes of the transistor becomes too narrow, leakage currents can flow and cause interference. Therefore it stopped at about ten nanometers. In order to still be able to accommodate more components and circuits on one processor, the IBM researchers rely on a three-dimensional chip architecture.

The transistors now consist of three conductive flat strip conductors, one on top of the other.

Each is completely enclosed by the gate electrode that controls the flow of current in the transistor.

Leakage currents no longer stand a chance.

This architecture allows transistors to be packed extremely tightly.

In addition, shorter switching times and higher computing power are possible with little heat generation, as laboratory measurements have shown.

It will take some time before the computers in the data centers can be equipped with 2-nanometer chips.

Bu anticipates mass production of the fast chips in ten years.